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While the RCC interface looks completely unlike everything else, I'd argue that it is less racy than the existing implementations which just do a read-modify-write cycle in a potentially multitasked (i.e., interrupts of different priority) application. Edit: nevermind, everything else uses bitbanding for atomic access, so not racy at all. I guess this interface is probably not that great as it makes usage more complex. |
| //! | Function | Pins | | ||
| //! |----------|-------| | ||
| //! | TX | PB13 | | ||
| //! | RX | PB12 | |
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Those tables do not fully reflect the pins defined on L59.
| } | ||
| } | ||
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| pins! { |
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Quick look at the stm32f407 datasheet shows that the CAN signals can be mapped to even more pins (for larger packages).
| Instance: Enable<Bus = APB1>, | ||
| { | ||
| /// Creates a CAN interaface. | ||
| pub fn new<P>(can: Instance, _pins: P, apb: &mut APB1) -> Can<Instance> |
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Its a common pattern to take ownership of the pins.
For CAN it might be a bit too restrictive though: stm32-rs/stm32f1xx-hal#215 (section Separate assign_pins())
thalesfragoso
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Thanks for the PR, nice work. I just left a few questions and suggestions, it would be nice if you could also drop the RTC commits.
| fn enable() { | ||
| unsafe { | ||
| let rcc = &(*RCC::ptr()); | ||
| bb::set(&rcc.apb2enr, $peren) |
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thalesfragoso
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Thanks again, sorry for the delay.
bors r+
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This adds support for can with the bxcan crate. This differs slightly from the stm32f1 pull request and the stm32f7 pull request: the
Can::newmethod takes ownership of the pins, which requires the user to configure the pins correctly, and doesn't use the afio functionality, which doesn't appear to be present here.